DBATU Remedial Exam MCQs

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Digital Logic Design Remedial Exam MCQs 2

Q: The combinational circuit given below is implemented with two NAND gates. To which of the following individual gates is its equivalent?

A: AND
B: NOT
C: OR
D: XOR

"A"

Q: The time required for a pulse to change from 10 to 90 percent of its maximum value is called ...

A: Decay time
B: Rise time
C: Propagation time
D: Operating speed.

"B"

Q: The number of full and half-adders required to add 16-bit numbers is

A: 8 half-adders, 8 full-adders
B: 1 half-adder, 15 full-adders
C: 16 half-adders, 0 full-adders
D: 16 half-adders, 0 full-adders

"B"

Q: Which of the following expressions is not equivalent to X ' ?

A: X NOR 1
B: X NAND 1
C: X NAND X
D: X NOR X

"A"

Q: Which of the following gates is known as coincidence detector ?

A: OR gate
B: NOT gate
C: AND gate
D: NAND gate

"C"

Q: A demultiplexer is used to

A: Route the data from single input to one of many outputs
B: Perform serial to parallel conversion
C: Both (a) & (b)
D: Select data from several inputs and route it to single output

"C"

Q: The digital multiplexer is basically a combination logic circuit to perform the operation

A: OR-OR
B: AND-OR
C: AND-AND
D: OR-AND

"B"

Q: Output of the following circuit is

A: 0
B: 1
C: x
D: x'

"A"

Q: If four 4 input multiplexers drive a 4 input multiplexer, we get a:

A: 16 input MUX
B: 8 input MUX
C: 4 input MUX
D: 2 input MUX

"A"

Q: A toggle operation cannot be performed using a single

A: AND gate
B: NAND gate
C: NOR gate
D: XOR gate

"A"

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